| 1 |
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| 2 | |
| 3 | * intel_pt_decoder.h: Intel Processor Trace support
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| 4 | * Copyright (c) 2013-2014, Intel Corporation.
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| 5 |
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| 6 |
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| 7 | #ifndef INCLUDE__INTEL_PT_DECODER_H__
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| 8 | #define INCLUDE__INTEL_PT_DECODER_H__
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| 9 |
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| 10 | #include <stdint.h>
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| 11 | #include <stddef.h>
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| 12 | #include <stdbool.h>
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| 13 |
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| 14 | #include <linux/rbtree.h>
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| 15 |
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| 16 | #include "intel-pt-insn-decoder.h"
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| 17 |
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| 18 | #define INTEL_PT_IN_TX (1 << 0)
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| 19 | #define INTEL_PT_ABORT_TX (1 << 1)
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| 20 | #define INTEL_PT_IFLAG (1 << 2)
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| 21 | #define INTEL_PT_ASYNC (1 << 2)
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| 22 | #define INTEL_PT_FUP_IP (1 << 3)
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| 23 | #define INTEL_PT_SAMPLE_IPC (1 << 4)
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| 24 |
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| 25 | enum intel_pt_sample_type {
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| 26 | INTEL_PT_BRANCH = 1 << 0,
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| 27 | INTEL_PT_INSTRUCTION = 1 << 1,
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| 28 | INTEL_PT_TRANSACTION = 1 << 2,
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| 29 | INTEL_PT_PTW = 1 << 3,
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| 30 | INTEL_PT_MWAIT_OP = 1 << 4,
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| 31 | INTEL_PT_PWR_ENTRY = 1 << 5,
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| 32 | INTEL_PT_EX_STOP = 1 << 6,
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| 33 | INTEL_PT_PWR_EXIT = 1 << 7,
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| 34 | INTEL_PT_CBR_CHG = 1 << 8,
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| 35 | INTEL_PT_TRACE_BEGIN = 1 << 9,
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| 36 | INTEL_PT_TRACE_END = 1 << 10,
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| 37 | INTEL_PT_BLK_ITEMS = 1 << 11,
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| 38 | INTEL_PT_PSB_EVT = 1 << 12,
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| 39 | INTEL_PT_EVT = 1 << 13,
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| 40 | INTEL_PT_IFLAG_CHG = 1 << 14,
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| 41 | };
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| 42 |
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| 43 | enum intel_pt_period_type {
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| 44 | INTEL_PT_PERIOD_NONE,
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| 45 | INTEL_PT_PERIOD_INSTRUCTIONS,
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| 46 | INTEL_PT_PERIOD_TICKS,
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| 47 | INTEL_PT_PERIOD_MTC,
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| 48 | };
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| 49 |
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| 50 | enum {
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| 51 | INTEL_PT_ERR_NOMEM = 1,
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| 52 | INTEL_PT_ERR_INTERN,
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| 53 | INTEL_PT_ERR_BADPKT,
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| 54 | INTEL_PT_ERR_NODATA,
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| 55 | INTEL_PT_ERR_NOINSN,
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| 56 | INTEL_PT_ERR_MISMAT,
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| 57 | INTEL_PT_ERR_OVR,
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| 58 | INTEL_PT_ERR_LOST,
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| 59 | INTEL_PT_ERR_UNK,
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| 60 | INTEL_PT_ERR_NELOOP,
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| 61 | INTEL_PT_ERR_EPTW,
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| 62 | INTEL_PT_ERR_MAX,
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| 63 | };
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| 64 |
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| 65 | enum intel_pt_param_flags {
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| 66 | |
| 67 | * FUP packet can contain next linear instruction pointer instead of
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| 68 | * current linear instruction pointer.
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| 69 |
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| 70 | INTEL_PT_FUP_WITH_NLIP = 1 << 0,
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| 71 | };
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| 72 |
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| 73 | enum intel_pt_blk_type {
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| 74 | INTEL_PT_GP_REGS = 1,
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| 75 | INTEL_PT_PEBS_BASIC = 4,
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| 76 | INTEL_PT_PEBS_MEM = 5,
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| 77 | INTEL_PT_LBR_0 = 8,
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| 78 | INTEL_PT_LBR_1 = 9,
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| 79 | INTEL_PT_LBR_2 = 10,
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| 80 | INTEL_PT_XMM = 16,
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| 81 | INTEL_PT_BLK_TYPE_MAX
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| 82 | };
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| 83 |
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| 84 | |
| 85 | * The block type numbers are not sequential but here they are given sequential
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| 86 | * positions to avoid wasting space for array placement.
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| 87 |
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| 88 | enum intel_pt_blk_type_pos {
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| 89 | INTEL_PT_GP_REGS_POS,
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| 90 | INTEL_PT_PEBS_BASIC_POS,
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| 91 | INTEL_PT_PEBS_MEM_POS,
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| 92 | INTEL_PT_LBR_0_POS,
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| 93 | INTEL_PT_LBR_1_POS,
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| 94 | INTEL_PT_LBR_2_POS,
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| 95 | INTEL_PT_XMM_POS,
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| 96 | INTEL_PT_BLK_TYPE_CNT
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| 97 | };
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| 98 |
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| 99 |
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| 100 | static inline int intel_pt_blk_type_pos(enum intel_pt_blk_type blk_type)
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| 101 | {
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| 102 | #define BLK_TYPE(bt) [INTEL_PT_##bt] = INTEL_PT_##bt##_POS + 1
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| 103 | const int map[INTEL_PT_BLK_TYPE_MAX] = {
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| 104 | BLK_TYPE(GP_REGS),
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| 105 | BLK_TYPE(PEBS_BASIC),
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| 106 | BLK_TYPE(PEBS_MEM),
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| 107 | BLK_TYPE(LBR_0),
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| 108 | BLK_TYPE(LBR_1),
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| 109 | BLK_TYPE(LBR_2),
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| 110 | BLK_TYPE(XMM),
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| 111 | };
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| 112 | #undef BLK_TYPE
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| 113 |
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| 114 | return blk_type < INTEL_PT_BLK_TYPE_MAX ? map[blk_type] - 1 : -1;
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| 115 | }
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| 116 |
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| 117 | #define INTEL_PT_BLK_ITEM_ID_CNT 32
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| 118 |
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| 119 | |
| 120 | * Use unions so that the block items can be accessed by name or by array index.
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| 121 | * There is an array of 32-bit masks for each block type, which indicate which
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| 122 | * values are present. Then arrays of 32 64-bit values for each block type.
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| 123 |
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| 124 | struct intel_pt_blk_items {
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| 125 | union {
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| 126 | uint32_t mask[INTEL_PT_BLK_TYPE_CNT];
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| 127 | struct {
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| 128 | uint32_t has_rflags:1;
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| 129 | uint32_t has_rip:1;
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| 130 | uint32_t has_rax:1;
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| 131 | uint32_t has_rcx:1;
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| 132 | uint32_t has_rdx:1;
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| 133 | uint32_t has_rbx:1;
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| 134 | uint32_t has_rsp:1;
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| 135 | uint32_t has_rbp:1;
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| 136 | uint32_t has_rsi:1;
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| 137 | uint32_t has_rdi:1;
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| 138 | uint32_t has_r8:1;
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| 139 | uint32_t has_r9:1;
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| 140 | uint32_t has_r10:1;
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| 141 | uint32_t has_r11:1;
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| 142 | uint32_t has_r12:1;
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| 143 | uint32_t has_r13:1;
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| 144 | uint32_t has_r14:1;
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| 145 | uint32_t has_r15:1;
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| 146 | uint32_t has_unused_0:14;
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| 147 | uint32_t has_ip:1;
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| 148 | uint32_t has_applicable_counters:1;
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| 149 | uint32_t has_timestamp:1;
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| 150 | uint32_t has_unused_1:29;
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| 151 | uint32_t has_mem_access_address:1;
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| 152 | uint32_t has_mem_aux_info:1;
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| 153 | uint32_t has_mem_access_latency:1;
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| 154 | uint32_t has_tsx_aux_info:1;
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| 155 | uint32_t has_unused_2:28;
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| 156 | uint32_t has_lbr_0;
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| 157 | uint32_t has_lbr_1;
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| 158 | uint32_t has_lbr_2;
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| 159 | uint32_t has_xmm;
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| 160 | };
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| 161 | };
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| 162 | union {
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| 163 | uint64_t val[INTEL_PT_BLK_TYPE_CNT][INTEL_PT_BLK_ITEM_ID_CNT];
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| 164 | struct {
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| 165 | struct {
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| 166 | uint64_t rflags;
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| 167 | uint64_t rip;
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| 168 | uint64_t rax;
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| 169 | uint64_t rcx;
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| 170 | uint64_t rdx;
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| 171 | uint64_t rbx;
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| 172 | uint64_t rsp;
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| 173 | uint64_t rbp;
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| 174 | uint64_t rsi;
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| 175 | uint64_t rdi;
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| 176 | uint64_t r8;
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| 177 | uint64_t r9;
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| 178 | uint64_t r10;
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| 179 | uint64_t r11;
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| 180 | uint64_t r12;
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| 181 | uint64_t r13;
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| 182 | uint64_t r14;
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| 183 | uint64_t r15;
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| 184 | uint64_t unused_0[INTEL_PT_BLK_ITEM_ID_CNT - 18];
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| 185 | };
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| 186 | struct {
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| 187 | uint64_t ip;
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| 188 | uint64_t applicable_counters;
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| 189 | uint64_t timestamp;
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| 190 | uint64_t unused_1[INTEL_PT_BLK_ITEM_ID_CNT - 3];
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| 191 | };
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| 192 | struct {
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| 193 | uint64_t mem_access_address;
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| 194 | uint64_t mem_aux_info;
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| 195 | uint64_t mem_access_latency;
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| 196 | uint64_t tsx_aux_info;
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| 197 | uint64_t unused_2[INTEL_PT_BLK_ITEM_ID_CNT - 4];
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| 198 | };
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| 199 | uint64_t lbr_0[INTEL_PT_BLK_ITEM_ID_CNT];
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| 200 | uint64_t lbr_1[INTEL_PT_BLK_ITEM_ID_CNT];
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| 201 | uint64_t lbr_2[INTEL_PT_BLK_ITEM_ID_CNT];
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| 202 | uint64_t xmm[INTEL_PT_BLK_ITEM_ID_CNT];
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| 203 | };
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| 204 | };
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| 205 | bool is_32_bit;
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| 206 | };
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| 207 |
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| 208 | struct intel_pt_vmcs_info {
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| 209 | struct rb_node rb_node;
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| 210 | uint64_t vmcs;
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| 211 | uint64_t tsc_offset;
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| 212 | bool reliable;
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| 213 | bool error_printed;
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| 214 | };
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| 215 |
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| 216 | |
| 217 | * Maximum number of event trace data in one go, assuming at most 1 per type
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| 218 | * and 6-bits of type in the EVD packet.
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| 219 |
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| 220 | #define INTEL_PT_MAX_EVDS 64
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| 221 |
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| 222 |
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| 223 | struct intel_pt_evd {
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| 224 | int type;
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| 225 | uint64_t payload;
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| 226 | };
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| 227 |
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| 228 | struct intel_pt_state {
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| 229 | enum intel_pt_sample_type type;
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| 230 | bool from_nr;
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| 231 | bool to_nr;
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| 232 | bool from_iflag;
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| 233 | bool to_iflag;
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| 234 | int err;
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| 235 | uint64_t from_ip;
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| 236 | uint64_t to_ip;
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| 237 | uint64_t tot_insn_cnt;
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| 238 | uint64_t tot_cyc_cnt;
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| 239 | uint64_t cycles;
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| 240 | uint64_t timestamp;
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| 241 | uint64_t est_timestamp;
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| 242 | uint64_t trace_nr;
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| 243 | uint64_t ptw_payload;
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| 244 | uint64_t mwait_payload;
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| 245 | uint64_t pwre_payload;
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| 246 | uint64_t pwrx_payload;
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| 247 | uint64_t cbr_payload;
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| 248 | uint64_t psb_offset;
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| 249 | uint32_t cbr;
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| 250 | uint32_t flags;
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| 251 | enum intel_pt_insn_op insn_op;
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| 252 | int insn_len;
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| 253 | char insn[INTEL_PT_INSN_BUF_SZ];
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| 254 | struct intel_pt_blk_items items;
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| 255 | int cfe_type;
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| 256 | int cfe_vector;
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| 257 | int evd_cnt;
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| 258 | struct intel_pt_evd *evd;
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| 259 | };
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| 260 |
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| 261 | struct intel_pt_insn;
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| 262 |
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| 263 | struct intel_pt_buffer {
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| 264 | const unsigned char *buf;
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| 265 | size_t len;
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| 266 | bool consecutive;
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| 267 | uint64_t ref_timestamp;
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| 268 | uint64_t trace_nr;
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| 269 | };
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| 270 |
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| 271 | typedef int (*intel_pt_lookahead_cb_t)(struct intel_pt_buffer *, void *);
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| 272 |
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| 273 | struct intel_pt_params {
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| 274 | int (*get_trace)(struct intel_pt_buffer *buffer, void *data);
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| 275 | int (*walk_insn)(struct intel_pt_insn *intel_pt_insn,
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| 276 | uint64_t *insn_cnt_ptr, uint64_t *ip, uint64_t to_ip,
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| 277 | uint64_t max_insn_cnt, void *data);
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| 278 | bool (*pgd_ip)(uint64_t ip, void *data);
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| 279 | int (*lookahead)(void *data, intel_pt_lookahead_cb_t cb, void *cb_data);
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| 280 | struct intel_pt_vmcs_info *(*findnew_vmcs_info)(void *data, uint64_t vmcs);
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| 281 | void *data;
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| 282 | bool return_compression;
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| 283 | bool branch_enable;
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| 284 | bool vm_time_correlation;
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| 285 | bool vm_tm_corr_dry_run;
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| 286 | uint64_t first_timestamp;
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| 287 | uint64_t ctl;
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| 288 | uint64_t period;
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| 289 | enum intel_pt_period_type period_type;
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| 290 | unsigned max_non_turbo_ratio;
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| 291 | unsigned int mtc_period;
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| 292 | uint32_t tsc_ctc_ratio_n;
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| 293 | uint32_t tsc_ctc_ratio_d;
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| 294 | enum intel_pt_param_flags flags;
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| 295 | unsigned int quick;
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| 296 | int max_loops;
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| 297 | };
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| 298 |
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| 299 | struct intel_pt_decoder;
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| 300 |
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| 301 | struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params);
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| 302 | void intel_pt_decoder_free(struct intel_pt_decoder *decoder);
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| 303 |
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| 304 | const struct intel_pt_state *intel_pt_decode(struct intel_pt_decoder *decoder);
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| 305 |
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| 306 | int intel_pt_fast_forward(struct intel_pt_decoder *decoder, uint64_t timestamp);
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| 307 |
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| 308 | unsigned char *intel_pt_find_overlap(unsigned char *buf_a, size_t len_a,
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| 309 | unsigned char *buf_b, size_t len_b,
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| 310 | bool have_tsc, bool *consecutive,
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| 311 | bool ooo_tsc);
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| 312 |
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| 313 | int intel_pt__strerror(int code, char *buf, size_t buflen);
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| 314 |
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| 315 | void intel_pt_set_first_timestamp(struct intel_pt_decoder *decoder,
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| 316 | uint64_t first_timestamp);
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| 317 |
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| 318 | #endif
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