| 1 | ==============
|
| 2 | AMDGPU DebugFS
|
| 3 | ==============
|
| 4 |
|
| 5 | The amdgpu driver provides a number of debugfs files to aid in debugging
|
| 6 | issues in the driver. These are usually found in
|
| 7 | /sys/kernel/debug/dri/<num>.
|
| 8 |
|
| 9 | DebugFS Files
|
| 10 | =============
|
| 11 |
|
| 12 | amdgpu_benchmark
|
| 13 | ----------------
|
| 14 |
|
| 15 | Run benchmarks using the DMA engine the driver uses for GPU memory paging.
|
| 16 | Write a number to the file to run the test. The results are written to the
|
| 17 | kernel log. VRAM is on device memory (dGPUs) or carve out (APUs) and GTT
|
| 18 | (Graphics Translation Tables) is system memory that is accessible by the GPU.
|
| 19 | The following tests are available:
|
| 20 |
|
| 21 | - 1: simple test, VRAM to GTT and GTT to VRAM
|
| 22 | - 2: simple test, VRAM to VRAM
|
| 23 | - 3: GTT to VRAM, buffer size sweep, powers of 2
|
| 24 | - 4: VRAM to GTT, buffer size sweep, powers of 2
|
| 25 | - 5: VRAM to VRAM, buffer size sweep, powers of 2
|
| 26 | - 6: GTT to VRAM, buffer size sweep, common display sizes
|
| 27 | - 7: VRAM to GTT, buffer size sweep, common display sizes
|
| 28 | - 8: VRAM to VRAM, buffer size sweep, common display sizes
|
| 29 |
|
| 30 | amdgpu_test_ib
|
| 31 | --------------
|
| 32 |
|
| 33 | Read this file to run simple IB (Indirect Buffer) tests on all kernel managed
|
| 34 | rings. IBs are command buffers usually generated by userspace applications
|
| 35 | which are submitted to the kernel for execution on an particular GPU engine.
|
| 36 | This just runs the simple IB tests included in the kernel. These tests
|
| 37 | are engine specific and verify that IB submission works.
|
| 38 |
|
| 39 | amdgpu_discovery
|
| 40 | ----------------
|
| 41 |
|
| 42 | Provides raw access to the IP discovery binary provided by the GPU. Read this
|
| 43 | file to access the raw binary. This is useful for verifying the contents of
|
| 44 | the IP discovery table. It is chip specific.
|
| 45 |
|
| 46 | amdgpu_vbios
|
| 47 | ------------
|
| 48 |
|
| 49 | Provides raw access to the ROM binary image from the GPU. Read this file to
|
| 50 | access the raw binary. This is useful for verifying the contents of the
|
| 51 | video BIOS ROM. It is board specific.
|
| 52 |
|
| 53 | amdgpu_evict_gtt
|
| 54 | ----------------
|
| 55 |
|
| 56 | Evict all buffers from the GTT memory pool. Read this file to evict all
|
| 57 | buffers from this pool.
|
| 58 |
|
| 59 | amdgpu_evict_vram
|
| 60 | -----------------
|
| 61 |
|
| 62 | Evict all buffers from the VRAM memory pool. Read this file to evict all
|
| 63 | buffers from this pool.
|
| 64 |
|
| 65 | amdgpu_gpu_recover
|
| 66 | ------------------
|
| 67 |
|
| 68 | Trigger a GPU reset. Read this file to trigger reset the entire GPU.
|
| 69 | All work currently running on the GPU will be lost.
|
| 70 |
|
| 71 | amdgpu_ring_<name>
|
| 72 | ------------------
|
| 73 |
|
| 74 | Provides read access to the kernel managed ring buffers for each ring <name>.
|
| 75 | These are useful for debugging problems on a particular ring. The ring buffer
|
| 76 | is how the CPU sends commands to the GPU. The CPU writes commands into the
|
| 77 | buffer and then asks the GPU engine to process it. This is the raw binary
|
| 78 | contents of the ring buffer. Use a tool like UMR to decode the rings into human
|
| 79 | readable form.
|
| 80 |
|
| 81 | amdgpu_mqd_<name>
|
| 82 | -----------------
|
| 83 |
|
| 84 | Provides read access to the kernel managed MQD (Memory Queue Descriptor) for
|
| 85 | ring <name> managed by the kernel driver. MQDs define the features of the ring
|
| 86 | and are used to store the ring's state when it is not connected to hardware.
|
| 87 | The driver writes the requested ring features and metadata (GPU addresses of
|
| 88 | the ring itself and associated buffers) to the MQD and the firmware uses the MQD
|
| 89 | to populate the hardware when the ring is mapped to a hardware slot. Only
|
| 90 | available on engines which use MQDs. This provides access to the raw MQD
|
| 91 | binary.
|
| 92 |
|
| 93 | amdgpu_error_<name>
|
| 94 | -------------------
|
| 95 |
|
| 96 | Provides an interface to set an error code on the dma fences associated with
|
| 97 | ring <name>. The error code specified is propagated to all fences associated
|
| 98 | with the ring. Use this to inject a fence error into a ring.
|
| 99 |
|
| 100 | amdgpu_pm_info
|
| 101 | --------------
|
| 102 |
|
| 103 | Provides human readable information about the power management features
|
| 104 | and state of the GPU. This includes current GFX clock, Memory clock,
|
| 105 | voltages, average SoC power, temperature, GFX load, Memory load, SMU
|
| 106 | feature mask, VCN power state, clock and power gating features.
|
| 107 |
|
| 108 | amdgpu_firmware_info
|
| 109 | --------------------
|
| 110 |
|
| 111 | Lists the firmware versions for all firmwares used by the GPU. Only
|
| 112 | entries with a non-0 version are valid. If the version is 0, the firmware
|
| 113 | is not valid for the GPU.
|
| 114 |
|
| 115 | amdgpu_fence_info
|
| 116 | -----------------
|
| 117 |
|
| 118 | Shows the last signalled and emitted fence sequence numbers for each
|
| 119 | kernel driver managed ring. Fences are associated with submissions
|
| 120 | to the engine. Emitted fences have been submitted to the ring
|
| 121 | and signalled fences have been signalled by the GPU. Rings with a
|
| 122 | larger emitted fence value have outstanding work that is still being
|
| 123 | processed by the engine that owns that ring. When the emitted and
|
| 124 | signalled fence values are equal, the ring is idle.
|
| 125 |
|
| 126 | amdgpu_gem_info
|
| 127 | ---------------
|
| 128 |
|
| 129 | Lists all of the PIDs using the GPU and the GPU buffers that they have
|
| 130 | allocated. This lists the buffer size, pool (VRAM, GTT, etc.), and buffer
|
| 131 | attributes (CPU access required, CPU cache attributes, etc.).
|
| 132 |
|
| 133 | amdgpu_vm_info
|
| 134 | --------------
|
| 135 |
|
| 136 | Lists all of the PIDs using the GPU and the GPU buffers that they have
|
| 137 | allocated as well as the status of those buffers relative to that process'
|
| 138 | GPU virtual address space (e.g., evicted, idle, invalidated, etc.).
|
| 139 |
|
| 140 | amdgpu_sa_info
|
| 141 | --------------
|
| 142 |
|
| 143 | Prints out all of the suballocations (sa) by the suballocation manager in the
|
| 144 | kernel driver. Prints the GPU address, size, and fence info associated
|
| 145 | with each suballocation. The suballocations are used internally within
|
| 146 | the kernel driver for various things.
|
| 147 |
|
| 148 | amdgpu_<pool>_mm
|
| 149 | ----------------
|
| 150 |
|
| 151 | Prints TTM information about the memory pool <pool>.
|
| 152 |
|
| 153 | amdgpu_vram
|
| 154 | -----------
|
| 155 |
|
| 156 | Provides direct access to VRAM. Used by tools like UMR to inspect
|
| 157 | objects in VRAM.
|
| 158 |
|
| 159 | amdgpu_iomem
|
| 160 | ------------
|
| 161 |
|
| 162 | Provides direct access to GTT memory. Used by tools like UMR to inspect
|
| 163 | GTT memory.
|
| 164 |
|
| 165 | amdgpu_regs_*
|
| 166 | -------------
|
| 167 |
|
| 168 | Provides direct access to various register apertures on the GPU. Used
|
| 169 | by tools like UMR to access GPU registers.
|
| 170 |
|
| 171 | amdgpu_regs2
|
| 172 | ------------
|
| 173 |
|
| 174 | Provides an IOCTL interface used by UMR for interacting with GPU registers.
|
| 175 |
|
| 176 |
|
| 177 | amdgpu_sensors
|
| 178 | --------------
|
| 179 |
|
| 180 | Provides an interface to query GPU power metrics (temperature, average
|
| 181 | power, etc.). Used by tools like UMR to query GPU power metrics.
|
| 182 |
|
| 183 |
|
| 184 | amdgpu_gca_config
|
| 185 | -----------------
|
| 186 |
|
| 187 | Provides an interface to query GPU details (Graphics/Compute Array config,
|
| 188 | PCI config, GPU family, etc.). Used by tools like UMR to query GPU details.
|
| 189 |
|
| 190 | amdgpu_wave
|
| 191 | -----------
|
| 192 |
|
| 193 | Used to query GFX/compute wave information from the hardware. Used by tools
|
| 194 | like UMR to query GFX/compute wave information.
|
| 195 |
|
| 196 | amdgpu_gpr
|
| 197 | ----------
|
| 198 |
|
| 199 | Used to query GFX/compute GPR (General Purpose Register) information from the
|
| 200 | hardware. Used by tools like UMR to query GPRs when debugging shaders.
|
| 201 |
|
| 202 | amdgpu_gprwave
|
| 203 | --------------
|
| 204 |
|
| 205 | Provides an IOCTL interface used by UMR for interacting with shader waves.
|
| 206 |
|
| 207 | amdgpu_fw_attestation
|
| 208 | ---------------------
|
| 209 |
|
| 210 | Provides an interface for reading back firmware attestation records.
|